March 2, 2014: The TRANSACT 2014 Steering Committee is delighted to announce the recipient of its 1st Distinguished Service Award: Mike Spear
March 2, 2014: Best Paper Award Winner: Improved Single Global Lock Fallback for Best-effort Hardware Transactional Memory (Irina Calciu, Tatiana Shpeisman, Gilles Pokam and Maurice Herlihy)
November 19, 2013: Due to multiple requests, the submission deadline has been extended to December 8, 2013. The submission website is now live.
The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. Recently, transactional memory has crossed two new thresholds. First, IBM and Intel are now shipping processors with hardware support for transactional memory. Second, the C++ Standard Committee has begun investigation into transactional memory as a new language feature. These developments highlight the demand for continued high quality TM research.
This workshop, the ninth in its series, will provide a forum for the presentation of research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel computing.
The workshop seeks papers on topics related to all areas of software and hardware for transactional computing. Specific topics of interest include but are not limited to:
- Run-time systems
- Hardware support
- Memory models
- Language mechanisms and semantics
- Formal verification
- Speculative concurrency
- Conflict detection and contention management
- Debugging and tools
- Static analysis and compiler optimizations
- Checkpointing and failure atomicity
- Persistence and I/O
- Nesting and exceptions
- Applications, workloads, and test suites
- Experience reports
Papers should present original research. As transactional memory spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. Papers focused on foundations should indicate how the work can be used to advance practice; papers on experiences and applications should indicate how the experiments reinforce or reflect principles.
Please use this link to access the submission website.
Papers must be submitted in PDF, and be no more than 8 pages in standard two-column SIGPLAN conference format including figures and tables but not including references. Shorter submissions are welcome. The submissions will be judged based on the merit of the ideas rather than the length. Submissions must be made through the on-line submission site. Final papers will be available to participants electronically at the meeting, but to facilitate resubmission to more formal venues, no archival proceedings will be published, and papers will not be sent to the ACM Digital Library.
Authors will have the option of having their final paper accessible from the workshop website. Authors must be familiar with and abide by SIGPLAN's republication policy, which forbids simultaneous submission to multiple venues and requires disclosing prior publication of closely related work.
At the discretion of the program committee and with the consent of the authors, particularly worthy papers may be recommended for a special journal issue.
Please see the ASPLOS homepage for information about registration, hotels, local attractions, etc.
- Submission Deadline: Sunday, December 1, 2013 Sunday, December 8, 2013 (11:59pm PST)
- Author Notification: Monday, January 27, 2014
- Final Copy Due: Monday, February 10, 2014
- Workshop: Sunday, March 2, 2014
8:45 — 9:00: Welcome (Tatiana Shpeisman and Justin Gottschlich)
9:00 — 10:00: Session 1a: Best Paper Candidates (Chair: Anita Sobe)
Improved Single Global Lock Fallback for Best-effort Hardware Transactional Memory (Irina Calciu, Tatiana Shpeisman, Gilles Pokam and Maurice Herlihy)
Early Experience on Transactional Execution of Java Programs Using Intel Transactional Synchronization Extensions (Richard Yoo, Sandhya Viswanathan, Vivek Deshpande, Christopher Hughes and Shirish Aundhe) (pdf)
10:00 — 10:30: Morning Break
10:30 — 11:30: Session 1b: Best Paper Candidates (Chair: Anita Sobe)
STAMP Need Not Be Considered Harmful (Wenjia Ruan, Yujie Liu and Michael Spear) (pdf)
On the Impact of Dynamic Memory Management on Software Transactional Memory Performance (Alexandro Baldassin, Edson Borin and Guido Araujo) (pdf)
11:30 — 11:35: Announcement of Best Paper Award Winner
11:35 — 1:00: Lunch
1:00 — 3:00: Session 2: HTM-Related (Chair: Michael Spear)
Reduced Hardware NOREC: An Opaque Obstruction-Free and Privatizing HyTM (Alex Matveev and Nir Shavit) (pdf)
Exploring the Performance and Programmability Design Space of Hardware Transactional Memory (Mike Dai Wang, Mihai Burcea, Linghan Li, Sahel Sharifymoghaddam, Greg Steffan and Cristiana Amza) (pdf)
Improve HTM Scaling with Consistency-Oblivious Programming (Hillel Avni and Bradley Kuszmaul) (pdf)
A Hybrid TM for Haskell (Ryan Yates and Michael Scott) (pdf)
3:00 — 3:30: Afternoon Break
3:30 — 5:30: Synchronization and Correctness (Chair: Tatiana Shpeisman)
Transaction-Friendly Condition Variables (Chao Wang, Yujie Liu and Michael Spear) (pdf)
Dynamic Concurrent Message Processing with Transactional Memory in the Actor Model (Yaroslav Hayduk, Anita Sobe and Pascal Felber)
Verifying Programs under Snapshot Isolation and Similar Relaxed Consistency Models (Ismail Kuru, Burcu Kulahcioglu Ozkan, Suha Orhun Mutluergil, Serdar Tasiran, Tayfun Elmas and Ernie Cohen) (pdf)
Integrating Transactionally Boosted Data Structures with STM Frameworks: A Case Study on Set (Ahmed Hassan, Roberto Palmieri and Binoy Ravindran) (pdf)
5:30 — 6:00: Closing Remarks
- Tatiana Shpeisman, Intel Labs
- Justin Gottschlich, Intel Labs
- Michael Spear, Lehigh University
- Aleksandar Dragojevic, Microsoft Research
- Panagiota Fatourou, University of Crete
- Justin Gottschlich, Intel Labs
- Maurice Herlihy, Brown University
- Angelina Lee, MIT
- Victor Luchangco, Oracle Labs
- Torvald Riegel, Red Hat
- Tatiana Shpeisman, Intel Labs
- Arrvindh Shriraman, Simon Fraser University
- Anita Sobe, University of Neuchatel, Switzerland
- Mike Spear, Lehigh University
- Peng Wu, IBM Research
- Babak Falsafi, CMU & EPFL
- Pascal Felber, Univ. of Neuchatel
- Dan Grossman, Univ. of Washington
- Rachid Guerraoui, EPFL
- Tim Harris, Oracle Labs
- Maurice Herlihy, Brown Univ.
- Tony Hosking, Purdue Univ.
- Suresh Jagannathan, Purdue Univ.
- Doug Lea, SUNY, Oswego
- Maged Michael, IBM T.J. Watson Research Center
- Eliot Moss, UMass
- Jan Vitek, Purdue Univ.
- Michael Scott, Univ. of Rochester
- Tatiana Shpeisman, Intel Labs
- Michael Spear, Lehigh Univ.
- Michael Swift, Univ. of Wisconsin
- Craig Zilles, UIUC
Please contact the program chair